Wow, this is such a cool idea. Translating regular instructions to SIMD instructions in order to run 16 copies of the same program at once, for fuzzing!https://gamozolabs.github.io/fuzzing/2018/10/14/vectorized_emulation.html …
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…and admittedly, http://tomforsyth1000.github.io/blog.wiki.html#%5B%5BWhy%20didn%27t%20Larrabee%20fail%3F%5D%5D … says Larrabee failed at graphics “mainly for reasons of time and politics”, so perhaps a new attempt could succeed. Oh, and modern GPUs do more compute, so Larrabee’s relative strength at compute would be better suited to today’s games.
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Still, I feel like Intel would want to stay far away from anything that looks like just a repeat of Larrabee.
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AVX-512 is exactly what Intel did with the bad ideas that came out of Larrabee rather than call it a waste of research $. They threw out the only good idea: massively parallel high performance non-speculative cores.
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Xeon Phi doesn’t count?
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I think those are fairly normal out-of-order speculative cores. They also moved towards selling them as a regular CPU instead of co-processors. "The PCIe based co-processor variant of Knight's Landing was never offered to the general market and was discontinued by August 2017"
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Well, I don’t see the point of having two vector ISAs (Gen) and SIMD (AVX-512) that largely overlap in functionality but are just incompatible, are programmer-exposed, and ship on the same die.
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See https://software.intel.com/en-us/articles/introduction-to-gen-assembly … — it’s basically like AVX-512 but just incompatible.
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Like, I’m sure Intel would prefer to only have one compiler backend to maintain…
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Any compiler backend maintained by Intel is going to be a joke, just a spec benchmark ad for their chips.
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Oh, also I just remember than Intel already did one ISA consolidation: Intel ME used to be ARC and is now x86.
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Glad the ISA for my box's backdoors has been consolidated...
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