Never really internalized before that 4K pages affect performance by limiting the total addressable memory by the TLB without a miss.
@MonoS94 No idea - and obviously that probably varies per chip. But I'm just saying it wasn't something I ever really thought through.
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@cmuratori Newer [Intel] chips dont seems to suffer from this http://www.7-cpu.com/cpu/Haswell.html … but fewer may hurts if data access layout isnt optimalThanks. Twitter will use this to make your timeline better. UndoUndo
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