@tom_forsyth @cmuratori And types are one thing; another problem is the multiple operands in several of the load/store variants,
-
-
Replying to @rygorous
@tom_forsyth@cmuratori then there's instructions with two destinations (removed in the AArch64) ver, things like VSWP that can't be...1 reply 0 retweets 0 likes -
Replying to @rygorous
@tom_forsyth@cmuratori expressed in the NEON intrinsics at all, and compilers are really crappy at mapping all of this. It sucks. :/1 reply 0 retweets 0 likes -
Replying to @rygorous
@tom_forsyth@cmuratori I would just use ASM, but our combination of targets has several different asms (only two speak ARM UAL),2 replies 0 retweets 0 likes -
Replying to @rygorous
@rygorous@cmuratori With a broken foundation like that, no wonder you're in such deep sh... oh, right - AT&T syntax. Um.1 reply 0 retweets 3 likes -
Replying to @tom_forsyth
@tom_forsyth@cmuratori "you either die a hero or live to see yourself become x86"2 replies 11 retweets 24 likes -
Replying to @rygorous
@rygorous@cmuratori Oh ARM. Once a "reduced" instruction set, now a byzantine tentacled mess like the best of them.2 replies 0 retweets 7 likes -
Replying to @tom_forsyth
@tom_forsyth@rygorous@cmuratori It doesn't have an instruction for solving polynomials...like VAX...thanks, college.1 reply 0 retweets 0 likes -
Replying to @pat_wilson
@pat_wilson@tom_forsyth@rygorous Guys, it just says _reduced_. It does not say what it was reduced _from_.2 replies 0 retweets 1 like -
Replying to @cmuratori
@cmuratori@tom_forsyth@rygorous RISCy description if you ask me1 reply 0 retweets 0 likes
@pat_wilson @tom_forsyth @rygorous How about "R"ISC as the new acronym :P
Loading seems to be taking a while.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.