Xekri

@babbageboole

Software architect and maker. Cats! Integrated circuits! Dragon! Singularitarian! Panpsychist! Also, Google Robotics.

Silicon Valley, USA
youtube.com/RobertBaruch
Joined September 2010
1,184 Photos and videos Photos and videos

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  1. 34 minutes ago

    FAMBLY

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  2. 9 hours ago

    It uses 's Project Bureau.

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  3. 9 hours ago

    I have something that I *think* can take a sequence of combinatorial logic layers and map it into a JED file for an ATF1502SE CPLD. Still waiting on hardware, but I was able to map a 74181 ALU onto an ATF1502. It doesn't attempt to optimize logic.

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  4. 22 hours ago

    You want to boop?

    1 reply 12 likes
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  5. 22 hours ago

    Snoot booping is best booping

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  6. Jan 28

    Wonder if I can use yosys and formal verification to decide what fuses can be set on the ATF1502 to solve my logic equations?

    1 reply 2 likes
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  7. Jan 28

    Just as a test (yes, I'm willing to lose the money) I placed an order to buy one share of GME on etrade. It went through immediately.

    2 replies 8 likes
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  8. Jan 27

    (original source image: )

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  9. Jan 27

    Correction: the network has been trained on WHITE human faces. For fuck's sake, it's 2021.

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  10. Jan 27

    , yet another example of racial bias in AI. Do better.

    4 replies 6 likes
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  11. Jan 27

    The network has been trained on human faces, so it tries to find human facial features. I showed it my cat on a sofa, and it turned the corner of the sofa into a mouth.

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  12. Jan 27

    5 replies 9 likes
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  13. Jan 27

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  14. Jan 27

    And, no, I don't mean DNP footprints on a single board. I mean two separate boards.

    3 replies 1 like
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  15. Jan 27

    I poorly adapted 's ATF15xx breakout board for the PLCC version. It's not nearly as pretty and it's quite wide (1.5 inches as opposed to 1 inch). I wish could have alternate PCBs for the same schematic.

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  16. Jan 25

    A disagreement at work between two rational individuals. We are both professional, and have different ideas, no hard feelings, no ego, and have scheduled a meeting with all stakeholders to figure this out. So why do I still feel like I've killed someone's kitten?

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  17. Jan 24

    I'm kinda feeling like this should be turned into wall art

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  18. Jan 24

    Awesome, I was able to list out all the fuses using 's prjbureau util.fusecli.

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  19. Jan 24

    I'm getting motivated to make little diagrams for these things.

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  20. Jan 24

    Was finally able to generate a minimal JED file for the ATF1502, by programming the output block at pin 33 to have D input of FF = 1, clock = pin 37 (GCLK1).

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