Creating spec for an iCE40UP5K development board. Please reply with your feedback: Anything important missing from that spec?pic.twitter.com/x4TKdVuKyd
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Here is an order link https://oshpark.com/shared_projects/XOydkgcZ …. I don't actually have it working yet, still writing Verilog for it, but project got postponed for my Spartan7 project. Once I have a working Verilog design, I will write about it and provide links with layer images, Gerbers, etc.
Excellent, thanks! Will keep an eye on it!
Here is the final layout. The only component other than the HyperRAM is a 0.1uF 0603 cap. There isn't anything on the backside.pic.twitter.com/YHICCs2uwV
Am I naughty for wishing there was a HyperFlash on the backside?
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