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Ben Laurie
@BenLaurie
·
Oct 25, 2019
I am puzzled by enthusiasm for various species of memory tagging, such as https://sifive.com/blog/sifive-shield-an-open-scalable-platform-architecture…, https://dovermicrosystems.com/solutions/coreguard/…, https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/enhancing-memory-safety…, which provide either coarse-grained or statistical protection when there's CHERI, which is fine-grained and exact. 1/2
community.arm.com
Arm MTE architecture: Enhancing memory safety
Arm takes a look at security threats through not addressing memory safety and how Arm's Armv8.5-A Memory Tagging Extension (MTE) can help.
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Curtis Walker
@alphasnupe
Replying to
@BenLaurie
Also, if memory serves correct, CHERI does not protect against data-only use after free attacks. So not exactly exact ;)
2:40 AM · Oct 27, 2019·Twitter for Android
Ben Laurie
@BenLaurie
·
Oct 28, 2019
Replying to
@alphasnupe
and
@zhanghuxi
https://repository.cam.ac.uk/handle/1810/296287…