I am puzzled by enthusiasm for various species of memory tagging, such as sifive.com/blog/sifive-sh, dovermicrosystems.com/solutions/core, community.arm.com/developer/ip-p, which provide either coarse-grained or statistical protection when there's CHERI, which is fine-grained and exact. 1/2
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Well maybe you should broaden your scope a bit and look beyond memory safety? For instance, how does CHERI enforce a policy for a mission critical system such that X can never happen before Y?

