Using the holidays for a 2-week coding session. Writing a new transactional memory manager that’s O(1) for all operations, completely non-blocking and progress-guaranteeing, and uses atomics only for writes.
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That’s a sensible approach and the one I see most often in talks. I have to wonder if there’s something processor manufacturers can do to mitigate it more.
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Amdahl’s law cannot be abstracted-away. For “mass market” exploitation of parallelism, little technical things help. But the code writer still needs to think about conceptual separation of contending things. Probably not too much to ask for gameplay code.
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