A Moogle  🏳️‍🌈 💻 🎮 🎶 🇸🇪

If someone turns the Verilog into an ASIC, is it suddenly a more accurate representation of the hardware?

No. But if the verilog was derived from a chip decap it is.

It's still a reimplementation. Take the 68000 for instance, all its internals uses latches while a fpga can only do flip-flops. fx68k is beautiful and externally identical to the real thing, but the internals are very different in practice.

Documenting those differences between emulation and the real thing is important. Many games in MAME are rendered using a frame buffer and blitting instead of line rasterization. The end result is identical from a player's perspective but not to someone that is fixing hardware

I really doubt people use verilog mister cores as reference instead of the infinitely more readable and patchable C++ of mame.

I completely agree. My point is that C++ code also may not be a good reference of how the hardware works.

And *my* point is that anyone can (and should) submit improvements to MAME that address such issues. But it's a bit difficult when one set of developers seems interested in sharing no knowledge whatsoever, while others share it freely.

It's not a matter of MAME "not being so". It's a matter of people abusing others' nostalgia to cop some bucks while saying with a straight face that MAME "can't" be so. It could, if information was shared, but it isn't. So at least have the balls to acknowledge the fuck-over.