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The bitstream that gets uploaded to an FPGA, unless it's concretely set in some ROM, is ostensibly software. It can be changed at run-time to configure the functionality of those logic elements. It is far more akin to software than even firmware.
FPGA emulation is super cool, and depending on the machine, it allows for accurate emulation with far less overhead. But it still depends on someone to accurately translate schematics, or hardware functionality, into what gets compiled into an uploadable bitstream.
![[ColeJ]](https://pbs.twimg.com/profile_images/1043000626056065024/vDRPnUpt_normal.jpg)
And that's really where the rubber meets the road here: You're still compiling Verilog or VHDL into a lower-level format, much as a software emulator gets compiled into machine code. It's not orthogonal, as uncritical, ignorant tech article writers make it sound. It's parallel.
Meanwhile, outside of a small number of FPGAs that have reconfigurable analog blocks, they're about as good at modeling analog effects as any purely software CPU. That resistor-ladder DAC on the arcade board is still just modeled as a LUT.
Which, if anything, is why I find a company called "Analogue, Inc." promoting FPGA technology as some sort of next coming of Christ when it comes to emulation to be so dryly hilarious. Their results are great, their products are great. But the name? Dang.
To make some of the terminology used above more clear: A logic element on an FPGA can model nearly any silicon gate, assuming it is something that fits into a look-up table. AND, OR, XOR, NOT, those sorts of things are trivial. But other, more complex lookups can be done, too.
Given an appropriate amount of effort, the outputs from an FPGA for a given set of inputs can be made to be indistinguishable from actual hardware, given enough effort. But that effort still needs to be made. You get very little for free.
Put another way: All sorts of tricks can be done to minimize die space on a silicon chip, potentially by re-using gates or other things. Even one step above transistors, an FPGA still does not re-create that exact configuration of gates. It still just re-creates the *behavior*.
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