Voit lisätä twiitteihisi sijainnin, esimerkiksi kaupungin tai tarkemman paikan, verkosta ja kolmannen osapuolen sovellusten kautta. Halutessasi voit poistaa twiittisi sijaintihistorian myöhemmin. Lue lisää
I managed to get it past most of those POST errors eventually, and passing the SDRAM test etc. I'd love to finish more of the core, and start seeing some proper graphics output. The debug stuff was generated by the FPGA itself, on the VGA output. It allows me to single-step etc
Well, once I have all of the features of the Newport board ironed out, I plan to also make it cycle-based, so that it emulates the actual draw time. At that point it should be a pretty solid foundation for a Verilog or VHDL version.
