Sigasi

@Sigasi

Creating the best VHDL, Verilog and SystemVerilog IDE for design and verification. Free Educational XPRT version available.

Ghent, Belgium
Vrijeme pridruživanja: travanj 2009.

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  1. 28. sij
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  2. proslijedio/la je Tweet
    24. sij

    VHDL Hardware Refactoring with Sigasi Studio David Clift introduces and explains the concept of Hardware Refactoring with VHDL. David then goes on to demonstrate how this useful and efficient practice is made easier in Sigasi Studio.

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    24. sij

    Taking my mug for a spin at the Lotte World Tower, South Korea’s tallest building

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  4. 21. sij
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  5. 21. sij

    Another Year, Another Birthday … Sigasi turns 12 today. We continue to work on improving your productivity and have a great gift ready for those who respond quickly. Numbers are limited, so apply now and find out what we have in store for you.

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  6. proslijedio/la je Tweet
    21. sij
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  7. 6. sij

    While you are writing HDL code, your code is broken, or incomplete, most of the time. This video demonstrates how Sigasi Studio handles code errors and allows you to focus on the real design and verification challenges, not on syntax!

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  8. 26. pro 2019.

    Sigasi Studio’s Dependencies View gives you a bird’s-eye view on all dependencies in your project. It shows the relationships between your files and makes it easy to see top levels and testbenches:

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  9. 13. pro 2019.

    We have just released Sigasi Studio 4.6 with a faster new (System)Verilog preprocessor, improved graphics, bug fixes and much more. Read the full release notes:

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  10. proslijedio/la je Tweet
    2. lis 2019.

    This video shows you how to export HTML Documentation in Sigasi Studio.

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  11. 19. stu 2019.

    with at Semisrael Expo 2019

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  12. 12. stu 2019.

    We are at Xilinx Developer Forum and we are looking forward to meeting you! Stop by our booth to get a demo of Sigasi Studio or to enjoy our famous Belgian chocolates.

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  13. 12. stu 2019.
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  14. 24. lis 2019.

    Visit us next week at Europe, stop by for a demo of the newest Sigasi Studio features and some delicious Belgian Chocolates. We are looking forward to meet you at booth #401!

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  15. proslijedio/la je Tweet
    21. lis 2019.

    Technical Article: Prefix all signals in an instantiation

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  16. 15. lis 2019.

    Use regexes in find/replace to quickly prefix signal names in Sigasi Studio

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  17. proslijedio/la je Tweet
    9. lis 2019.

    Hover to evaluate Hexadecimal Values

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  18. 3. lis 2019.
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  19. 30. ruj 2019.

    Join us at the Xilinx Developer Forum on October 1-2

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  20. 25. ruj 2019.

    The Ghent Functional Programming Meetup was fun! Entertaining stories by Romain Slootmaekers from the trenches of software development. Great insights into the choice of programming languages and into evolving insights during a decade of software development.

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