Then outlaw mul too, because div by constant is basically just a mul with some bits thrown away...
No, that's div by variable which is completely different in complexity from div by constant.
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So we agree? - Division by a power of two is trivial - Division by a constant can be substituted with multiplication + correction step - Division by a 'variable' is hard Last two are not well-suited to FPGAs. They requires a lot of cycles/resources to get the accuracy.
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I'll agree to that with the caveat that *exact* division by a variable is hard. In DSP we can often tolerate some error / noise and so an inverse LUT coupled with a multiplier is often sufficient and quite fast for hardware implementations.
End of conversation
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