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RichFelker's profile
Rich Felker
Rich Felker
Rich Felker
@RichFelker

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Rich Felker

@RichFelker

Yeah, I do @musllibc, FOSS & infosec stuff. But now is not the time for a mostly-/only-tech Twitter feed.

musl-libc.org
Joined March 2014

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    1. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @erincandescent @oshepherd and

      Been there done that got the postcard.

      1 reply 0 retweets 2 likes
    2. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @stephentyrone @oshepherd and

      Not a big problem when writing from scratch. Massive goddamn pain in the ass when trying to patch hand-written asm designed to use everything available.

      1 reply 0 retweets 2 likes
    3. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @stephentyrone @oshepherd and

      Could be worse though, could be Cortex-M0 asm.

      1 reply 0 retweets 0 likes
    4.  🎃 unsafe { mem::transmute(@erincandescent) }  🎃‏ @erincandescent 18 Nov 2017
      Replying to @stephentyrone @hikari_no_yume and

      ...That is Thumb-1 (its a complete superset of the usermode ARMv4T instructions)

      1 reply 0 retweets 0 likes
    5. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @erincandescent @oshepherd and

      Yeah, you’re right. For some reason I was misremembering having CLZ. Ugh, bad memories.

      1 reply 0 retweets 2 likes
    6. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @stephentyrone @oshepherd and

      (FFS people, when you design an ISA, put CLZ in. The fact that you never see it in high-level languages does not mean it’s not necessary.)

      2 replies 0 retweets 4 likes
    7. Steve Canon‏ @stephentyrone 18 Nov 2017
      Replying to @stephentyrone @oshepherd and

      Someone really needs to publish a paper that’s just a list of bad ISA and ABI decisions and why they’re bad and what to do instead.

      5 replies 4 retweets 26 likes
    8.  🎃 unsafe { mem::transmute(@erincandescent) }  🎃‏ @erincandescent 18 Nov 2017
      Replying to @stephentyrone @hikari_no_yume and

      Starting point: * Your ISA should have [R+R<<k] loads/stores * An instruction which can compute A=B+C<<k is incredibly useful * 20-bit branch range is not enough (look at the size of a chromium lib sometime) * Have something like A64 BFM or PPC RLWINM

      5 replies 0 retweets 14 likes
    9. Rich Felker‏ @RichFelker 18 Nov 2017
      Replying to @erincandescent @oshepherd and

      * Decide on a reasonable register file size bound and never expand it. You subtly break ABI (stack requirements for signals) & destroy context switch performance for sake of bs benchmarks.

      1 reply 0 retweets 2 likes
    10. Det är blott stjärnorna som vet  ⭐️ other Andrea‏ @hikari_no_yume 18 Nov 2017
      Replying to @RichFelker @oshepherd and

      if you need more registers, that’s what cache is for, right?

      1 reply 0 retweets 1 like
      Rich Felker‏ @RichFelker 18 Nov 2017
      Replying to @hikari_no_yume @oshepherd and

      Yes but it's not "more registers" it's "wider SIMD registers" (bs like AVX512).

      8:23 PM - 18 Nov 2017
      • 1 Like
      • Det är blott stjärnorna som vet ⭐️ other Andrea
      1 reply 0 retweets 1 like
        1. New conversation
        2. Det är blott stjärnorna som vet  ⭐️ other Andrea‏ @hikari_no_yume 18 Nov 2017
          Replying to @RichFelker @oshepherd and

          gotcha, same thing in my book I’m glad AVX-512 looks as ridiculous to not-me

          1 reply 0 retweets 0 likes
        3. Steve Canon‏ @stephentyrone 18 Nov 2017
          Replying to @hikari_no_yume @RichFelker and

          AVX-512 combines absolutely critical improvements to the the x86 SIMD ISA with wider registers that very few people want.

          2 replies 0 retweets 4 likes
        4. Det är blott stjärnorna som vet  ⭐️ other Andrea‏ @hikari_no_yume 18 Nov 2017
          Replying to @stephentyrone @RichFelker and

          oh right it’s a catch-all term for a bunch of different extensions, right?

          1 reply 0 retweets 0 likes
        5. Det är blott stjärnorna som vet  ⭐️ other Andrea‏ @hikari_no_yume 18 Nov 2017
          Replying to @hikari_no_yume @stephentyrone and

          what’s the useful stuff

          1 reply 0 retweets 0 likes
        6. Steve Canon‏ @stephentyrone 18 Nov 2017
          Replying to @hikari_no_yume @RichFelker and

          Real Permutes, conversion between floating point and unsigned, orthogonality of integer arithmetic (i.e. most ops available for every type, signed and unsigned), assorted nice-to-have features for writing math libraries.

          1 reply 0 retweets 2 likes
        7. Steve Canon‏ @stephentyrone 18 Nov 2017
          Replying to @stephentyrone @hikari_no_yume and

          Conflict detect, predication, extract/deposit enable vectorizing some stuff that was previously unvectorizable.

          0 replies 0 retweets 2 likes
        8. End of conversation

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