Is this specific to latest DDR silliness & dangerous timing margins? Earlier DDR seems relatively easy to drive.
I mean from a standpoint of programming x86 early boot - can you clock dram down there so naive timing params work?
-
-
And what happens after you need to clock it back up to run the OS?
-
Why do you need to?
-
Wirth's Law, our insatiable desire for speed, reducing the agonizing slowness of waiting for memory on cache miss.
-
Law of no premature optimization: first make it work right, then make it fast, but only if you need to.
-
Are you volunteering your skills to go RE MRC/FSP code? :P
-
No, just volunteering unconventional approaches as ideas to crack open the platform. Maybe they're bogus or maybe they inspire someone.
End of conversation
New conversation -
-
-
I don't think anybody really knows. The details of the x86 memory controller aren't documented or else reverse engineering MRC would be easy
Thanks. Twitter will use this to make your timeline better. UndoUndo
-
Loading seems to be taking a while.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.