What would it take to get this running on http://j-core.org ?
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We both work with the https://j-core.org engineers, and I at least think it's a much better technology.
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It's more apples and oranges. RISC-V isn't a technology but an ISA implemented on various soft (and recently, hard) cpus.
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Regarding the ISAs, RV is more modern and has many nice properties (but some not so nice), and tooling is lacking but progressing well.
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SH ISA has ancient prior art as strong counter against any patent attacks, existing tooling, & very high code density.
End of conversation
New conversation -
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In b4 "it's implemented in C, so it's not secure!!11one" comments.
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