working on C compiler for SH: writes out logic for loading a double constant; has thought that on nearly any other arch this would be a joke
Note: rather than 3 insns each time, the normal idiom would be to try keeping a nearby addr in a reg so you just need 2x fmov.s.
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possibly could try to do it speculatively (skip the mova if the needed const addr just happens to be in R0 & was not stomped). will see...
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This is why register allocation is part of writing a compiler.
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ok. currently register allocation is used for 3AC registers, but not for back-end scratchpad stuff (ex: consts or mem load/store...).
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OTOH: found the va_list bug: va_arg return value was getting stomped by the code for trying to store it (disp calcs for larger stack frames)
End of conversation
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