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RichFelker's profile
Rich Felker
Rich Felker
Rich Felker
@RichFelker

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Rich Felker

@RichFelker

Yeah, I do @musllibc, FOSS & infosec stuff. But now is not the time for a mostly-/only-tech Twitter feed.

musl-libc.org
Joined March 2014

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    1. Sebastian Aaltonen‏ @SebAaltonen 12 Dec 2016
      Replying to @cr88192 @rygorous

      OoO works pretty well with array random access. It can calculate address to and fetch multiple array items concurrently.

      2 replies 0 retweets 0 likes
    2. William D. Jones‏ @cr1901 12 Dec 2016
      Replying to @SebAaltonen @cr88192 @rygorous

      How can OoO fetch multiple items concurrently? I feel like I'm missing something...

      2 replies 0 retweets 0 likes
    3. Fabian Giesen‏ @rygorous 12 Dec 2016
      Replying to @cr1901 @SebAaltonen @cr88192

      "for (i = 0; i < N; ++i) doThing(x[i]);" doThing for i=1 can start before i=0 finishes (if no data deps)

      2 replies 0 retweets 0 likes
    4. Fabian Giesen‏ @rygorous 12 Dec 2016
      Replying to @rygorous @cr1901 and

      in practice it's not rare for the FE to be 3+ iterations ahead in short loops

      2 replies 0 retweets 0 likes
    5. Steve Canon‏ @stephentyrone 12 Dec 2016
      Replying to @rygorous @cr1901 and

      yes! Often hundreds of instructions at a time in some phase of being processed.

      1 reply 0 retweets 0 likes
    6. Brendan G Bohannon‏ @cr88192 12 Dec 2016
      Replying to @stephentyrone @rygorous and

      newer/Intel specific, or also true of mid/late 2000s AMD chips (K9 & K10)?...

      1 reply 0 retweets 0 likes
    7. Fabian Giesen‏ @rygorous 12 Dec 2016
      Replying to @cr88192 @stephentyrone and

      well over 100 instructions in flight is true of current Intel, AMD, and high-end ARM chips.

      2 replies 0 retweets 1 like
    8. Rich Felker‏ @RichFelker 12 Dec 2016
      Replying to @rygorous @cr88192 and

      How does that avoid P4-era pathologically-bad performance on misses?

      2 replies 0 retweets 0 likes
    9. Steve Canon‏ @stephentyrone 12 Dec 2016
      Replying to @RichFelker @rygorous and

      better predictors, better at discarding results without needing to flush everything.

      1 reply 0 retweets 1 like
    10. Steve Canon‏ @stephentyrone 12 Dec 2016
      Replying to @stephentyrone @RichFelker and

      i.e. finer grained tracking of everything. Power/area/complexity cost is worth it.

      2 replies 0 retweets 1 like
      Rich Felker‏ @RichFelker 12 Dec 2016
      Replying to @stephentyrone @rygorous and

      Why can't we just use that area for 100x as many super-dumb cores?

      6:18 PM - 12 Dec 2016
      5 replies 0 retweets 0 likes
        1. New conversation
        2. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @RichFelker @stephentyrone

          Short version is that, even if you have a workload that scales to 100 cores, that's not necessarily a very

          1 reply 0 retweets 0 likes
        3. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          power-efficient thing to do either. There's structural reasons for why communication within a core is more

          1 reply 0 retweets 0 likes
        4. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          efficient than between cores. Having lots of small cores work on disjoint data gives good power/perf. If you have

          1 reply 0 retweets 0 likes
        5. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          that kind of workload. But if there's any potential of sharing or need to communicate, things change.

          1 reply 0 retweets 0 likes
        6. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          Memory access (and more mem BW) is *crazy* expensive in terms of power. Hence, caches. But caches are only good

          1 reply 0 retweets 0 likes
        7. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          with sufficient locality.

          1 reply 0 retweets 0 likes
        8. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          Other the past 10 years, two trends: 1. small number of relatively fancy cores good at extracting parallelism out

          1 reply 0 retweets 0 likes
        9. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @rygorous @RichFelker @stephentyrone

          of code that has good locality of reference (and then use a good cache hierarchy). 2. Large number of super-dumb

          1 reply 0 retweets 0 likes
        10. 10 more replies
        1. New conversation
        2. Sebastian Aaltonen‏ @SebAaltonen 15 Dec 2016
          Replying to @RichFelker @stephentyrone and

          you can, if you are willing to sacrifice cache coherency: https://www.extremetech.com/extreme/230458-meet-the-new-worlds-fastest-supercomputer-chinas-taihulight …

          1 reply 0 retweets 0 likes
        3. Rich Felker‏ @RichFelker 16 Dec 2016
          Replying to @SebAaltonen @stephentyrone and

          You only need coherency at atomics, & that can be done via global flush on any atomic

          1 reply 0 retweets 0 likes
        4. Rich Felker‏ @RichFelker 16 Dec 2016
          Replying to @RichFelker @SebAaltonen and

          Performance would be pretty terrible though, I think. :-P

          1 reply 0 retweets 0 likes
        5. Brendan G Bohannon‏ @cr88192 16 Dec 2016
          Replying to @RichFelker @SebAaltonen and

          yeah. one can make synchronization and inter-core communication be special cases.

          1 reply 0 retweets 1 like
        6. Sebastian Aaltonen‏ @SebAaltonen 16 Dec 2016
          Replying to @cr88192 @RichFelker and

          you could also have non-coherent pages (default) and coherent pages for communication.

          1 reply 0 retweets 0 likes
        7. Rich Felker‏ @RichFelker 16 Dec 2016
          Replying to @SebAaltonen @cr88192 and

          That needs a new programming model. HW imposing that = destined to fail miserably.

          2 replies 0 retweets 0 likes
        8. Brendan G Bohannon‏ @cr88192 16 Dec 2016
          Replying to @RichFelker @SebAaltonen and

          my idle thinking here was probably a "make this page sync" opcode or similar.

          2 replies 0 retweets 0 likes
        9. Rich Felker‏ @RichFelker 16 Dec 2016
          Replying to @cr88192 @SebAaltonen and

          That's a radically different programming model. Locks don't work to synchronize.

          1 reply 0 retweets 0 likes
        10. 1 more reply
        1. Rich Felker‏ @RichFelker 12 Dec 2016
          Replying to @RichFelker @stephentyrone and

          make -j800 ftw

          0 replies 0 retweets 1 like
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        1. New conversation
        2.  🎃 unsafe { mem::transmute(@erincandescent) }  🎃‏ @erincandescent 12 Dec 2016
          Replying to @RichFelker @stephentyrone @rygorous

          In addition to what ryg has said: interconnect explodes, memory hierarchy becomes more complex

          1 reply 0 retweets 1 like
        3.  🎃 unsafe { mem::transmute(@erincandescent) }  🎃‏ @erincandescent 12 Dec 2016
          Replying to @erincandescent @RichFelker and

          your 100 super dumb cores need caches, which need snooping. interconnect needs snoop filters...

          3 replies 0 retweets 0 likes
        4. John Regehr‏ @johnregehr 12 Dec 2016
          Replying to @erincandescent @oshepherd and

          nah, we'll solve this at the PL level, right??

          1 reply 0 retweets 1 like
        5. Brendan G Bohannon‏ @cr88192 12 Dec 2016
          Replying to @johnregehr @oshepherd and

          maybe give each one local memory and message passing; no big unified addr space?

          3 replies 0 retweets 0 likes
        6. Fabian Giesen‏ @rygorous 12 Dec 2016
          Replying to @cr88192 @johnregehr

          AKA distributed computing. Now you have 10 problems, and that's only the ones you already know about!

          0 replies 0 retweets 1 like
        7. End of conversation

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