ever seen one of those sentences that become worse with every word?pic.twitter.com/A68MOVLG79
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Yes. The instruction encoding for MIPS r6 is gratuitously different "to recover opcode space for future use".
A MIPS r6 chip cannot run original MIPS binaries except with trap-and-emulate (and that will break once the space is reassigned)
but why
Presumably because somebody thought it was wasteful that ll/sc/etc had lots of bits for address offsets...
...erm, make that "sufficiently wasteful to justify making a whole new ISA and hiding that it's a new ISA". Uhg.
the people with the sensible ideas got stuck in the delay slot
the ISA designers are living in a pipeline bubble
i am not well-versed in ISA design so any speculation on my part is likely hazardous
I can't precisely say when things went rough so let's just abort this conversation
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