To you, it's just two cores trying to write to an address at the same time. But to the fabric, it's this. (Source: http://parlab.eecs.berkeley.edu/sites/all/parlab/files/20091029-goodman-ssccp.pdf …)pic.twitter.com/keopAglA4G
You can add location information to your Tweets, such as your city or precise location, from the web and via third-party applications. You always have the option to delete your Tweet location history. Learn more
(for some reason missed this) not necessarily a data race, remember this is all at cache line granularity.
and on the bus/fabric level, all line state changes for cacheable memory are (and must be) atomic. No exceptions.
What does "atomic" mean in the context of "bus/fabric" level? If it doesn't happen in a single clock cycle (and a cache memory >>
update won't- ~3 cycles for L1?), couldn't other CPUs "see" that a memory transaction is in progress/not finished?
They have to! That's the whole flurry of messages going around in that diagram.
It's still atomic though: state changes (and updates) either happen fully or not at all.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.