So apparently MIPS R6 is a new ISA that's not even backwards compatible with previous MIPS ISA levels. Can anyone confirm?
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Replying to @RichFelker
As I understand it, they quietly re-encoded some insns to new opcodes and reused the old opcode space so you can't even trap & emulate.
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Replying to @RichFelker
@RichFelker Maybe we can finally supplant MIPS with OpenRISC or RISC-V or something...1 reply 0 retweets 0 likes -
Replying to @RichFelker
@RichFelker@risc_v I have found or1k Verilog code to be very difficult to read. However, I should try again to see if that was just a fluke1 reply 0 retweets 0 likes
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