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RichFelker's profile
Rich Felker
Rich Felker
Rich Felker
@RichFelker

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Rich Felker

@RichFelker

Yeah, I do @musllibc, FOSS & infosec stuff. But now is not the time for a mostly-/only-tech Twitter feed.

musl-libc.org
Joined March 2014

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    1. Rich Felker‏ @RichFelker Aug 26

      Reminder: all Spectre, except v1 style, should be fully fixable, without trusting vendor ucode updates to do it right, by flushing whole cache hierarchy at every kernelspace entry and exit and turning off HT. Anyone tried this and measured cost?

      3 replies 0 retweets 2 likes
    2. @landley‏ @landley Aug 26
      Replying to @RichFelker

      Presumably you could safely HT threads of the same process?

      1 reply 0 retweets 0 likes
    3. Koral‏ @Koral_001 Aug 26
      Replying to @landley @RichFelker

      I don't think so. Security boundary is not just at ht these days. If your application is sandboxing the execution of something else like browsers do with js this is a problem.

      1 reply 0 retweets 0 likes
    4. Rich Felker‏ @RichFelker Aug 26
      Replying to @Koral_001 @landley

      Right, this is why I said except v1 style.

      1 reply 0 retweets 0 likes
    5. @landley‏ @landley Aug 26
      Replying to @RichFelker @Koral_001

      Presumably process could provide a HT ok flag, or disable it when call to mprotect or namespace or something? Hmmm...

      1 reply 0 retweets 0 likes
    6. Rich Felker‏ @RichFelker Aug 27
      Replying to @landley @Koral_001

      Running tasks sharing same vm space on both HT threads is no loss in protection if you only flush cache at vm context switch, but doesn't allow you to protect kernel memory from the user task.

      1 reply 0 retweets 0 likes
    7. @landley‏ @landley Aug 27
      Replying to @RichFelker @Koral_001

      So you'd need to halt the other thread in the pair when either entered the kernel.

      1 reply 0 retweets 0 likes
    8. Rich Felker‏ @RichFelker Aug 27
      Replying to @landley @Koral_001

      Yeah. You could do it with IPI's but then you're just going to make syscall entry/exit even more expensive...

      1 reply 0 retweets 0 likes
    9. @landley‏ @landley Aug 27
      Replying to @RichFelker @Koral_001

      Except IPI between HT should be trivial?

      1 reply 0 retweets 0 likes
      Rich Felker‏ @RichFelker Aug 27
      Replying to @landley @Koral_001

      Not any moreso than cross-core. The whole pipeline has to be flushed, the hardware and software sides of exception handling have to run, ...

      9:36 AM - 27 Aug 2018
      1 reply 0 retweets 0 likes
        1. New conversation
        2. @landley‏ @landley Aug 27
          Replying to @RichFelker @Koral_001

          An interrupt vector whose handler is the HLT instruction seems cheap enough for a quick stop. Resuming's slightly fiddlier...

          1 reply 0 retweets 0 likes
        3. Rich Felker‏ @RichFelker Aug 27
          Replying to @landley @Koral_001

          If you do that I don't think it's resumeable. You would rather spin on a variable "while(sibling core is in kernel)" then ret-to-user. You also need to multiplex IPI with other kernel use of it, which brings in nontrivial kernel surface.

          1 reply 0 retweets 0 likes
        4. @landley‏ @landley Aug 27
          Replying to @RichFelker @Koral_001

          And somebody would signal() the HT while the other thing was in kernel and run exploit code in the handler... Needs HW support.

          1 reply 0 retweets 0 likes
        5. Rich Felker‏ @RichFelker Aug 27
          Replying to @landley @Koral_001

          No, signals can't interrupt kernelspace except voluntarily via EINTR/restart. They're handled on return from kernel to user.

          0 replies 0 retweets 0 likes
        6. End of conversation

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