all I know is it has to introduce a delay
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I think it may be fixable by just stalling speculative loads not already in L1 which should have low impact. But not 100% sure that's sufficient.
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plausibly the pressures of Moore's Law are part of what got us here
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Intel actually declared the economic version of Moore's Law dead last year (next gen would be equal not less cost)
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People seem to forget Moore’s 2nd Law: Moore’s Law is not a Law, but a temporary trend.
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Well, physical pin out for the cache could restore secure speculative execution (that will cost more of course)
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I don’t think we’ve begun to really understand the full implications of this kind of bug
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Should be feasible: cancel speculative ops immediately(!) on irqs, add flag to cache rows whether row contains speculative output, clear all flagged rows on ctx change, reset flags when being sure processing the right exec path. Needs hw change µC update insufficient.
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Moore's law was already nearly-dead
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Arguably a good thing, it'd be nice to have some time for society to catch up with technology
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