One stupid question (not for ARM actually).
How Wow64Transition’s address can be derived from 0x33 code segment ?!
Isn’t descriptor’s base address limited to 32bit? 
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I don't know what you mean by the question. The jmp 0x33:0x12345678 moves 0x33 to CS and 0x12345678 to EIP. The base address of that segment is 0.
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As to the CHPE compiler, public MSVC seems to support the /wowa64 switch which leads to building in multiple passes with /hybrid:x86arm64 and /hybrid:x86native and a few defines so code can tell them apart.
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... though it seems to depend on some standard library bits and bobs such as __os_wowa64_exception_handler. :(
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Very interesting and detailed - thanks!
Hvala. Twitter će to iskoristiti za poboljšanje vaše vremenske crte. PoništiPoništi
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Incredible job! Well done, sir!
Hvala. Twitter će to iskoristiti za poboljšanje vaše vremenske crte. PoništiPoništi
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@osnews read thisHvala. Twitter će to iskoristiti za poboljšanje vaše vremenske crte. PoništiPoništi
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