Thanx for this nice write-up @Pelissier_S ! Hope all the teams enjoy it, it's not so common to run a shellcode on real RISC-V target 
. That was the intended solution, rather than a C code compressed with -O3 at compile stage 
. GG!
Write-up for task RISC-Y Business @ph0wn:
http://duksctf.github.io/2019/12/13/ph0wn-RISC-Y-Business.html …
Thanks @PagetPhil for the great challenge on a @risc_v target !
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Hvala. Twitter će to iskoristiti za poboljšanje vaše vremenske crte. PoništiPoništi
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Yes, this one, ordered in May, received in October, with 2 boards broken
. But it was cool to made a challenge with this little RISC-V MCU; the goal of the GD32F1 serie is to replace the ST32F1 from ST. GigaDevice choose the same RAM/FLASH/IOmapping/Flash @/Ram @! - Još 1 odgovor
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