Sounds very similar to what we proposed here: https://arxiv.org/abs/1905.09100 #spectre
We've just released a new paper "New Memory Type Against Speculative Side-Channel Attacks". Read it here: https://bit.ly/nonspecmemtype @wildsator @bsdaemon @Kekai_Hu #WeAreSTORM @IntelSTORMTeam
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As we've discussed in private, we will update the paper to add the proper reference and explain what are the differences. Thanks for reaching out.
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AKA the Guard bit (which we (ab)used back in 2003) for PowerPC: https://www.xilinx.com/support/documentation/user_guides/ug011.pdf …pic.twitter.com/IGj0l4z0Pb
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Ah! I will not argue on their definition of speculation (which seems to be only branch prediction), but look into the next paragraph of the documentation and you will see it does not work! :) We will anyway update the paper to add that reference as well.pic.twitter.com/HPzb4XTX43
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Interesting paper. Q: Does this aim to also protect VM from leaking another VM RAM? (E.g. By L1TF from sibling) As that would require ability to define SAPM pages per HT or core and thus PTE bit doesn't suffice this requirement. What's the design for that?
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