on musl, locks are actually locks, 100% of the time, verses glibc where they are not.
if your multithreaded application has unexpected performance degradation on musl, it may mean that you are contending on locks you don't actually need.
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no, this time they came to alpine-devel to pitch us on making a glibc alpine 😵💫
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Ah. FWIW, I consider never having to deal with the TSX mess and endless cpu bugs turning safe and correct code unstable as one of the decisions I'm most happy with about musl.
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It is interesting ARM added TSX as optional for ARMv9 while IBM removed TSX from Power10 (or was it 11).
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Speculative execution is already bad enough without speculating "what if we actually got the lock that we didn't"...
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HLE and TSX are disabled on almost all their CPUs with updated microcode, but most Linux distributions aren't shipping it by default.
Microcode is meant to be shipped via motherboard firmware updates but most vendors don't provide good support and cut it off after a few years.
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It's possible they've disabled HLE on all their CPUs but I think TSX might still be enabled on the Comet Lake / Ice Lake generation where the feature was dropped.