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TIL: The most popular 64-bit architecture in the world has a small address space. Kills any hope of never reusing malloc addresses.
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Replying to @DanielMicay @pcwalton and 2 others
On arm64, you typically only have a 39-bit address space although it can be 48-bit like x86_64. The kernel takes half so it's really 38-bit or 47-bit. 38-bit is already far too small to use hardened_malloc with the normal configuration. 47-bit is 128 TiB which isn't limitless.
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Replying to and
The per-process virtual memory. Typically: 128TiB for userspace on x86_64 and only 256GiB for userspace on arm64. It may still seem like a lot but consider ASLR offsets, all the use cases for shadow data (CFI, ASan, etc.), memory mapped files including databases, stacks, etc.
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Replying to and
No, I think that seems low. Anyway aarch64 is still predominantly on what was traditionally considered embedded platforms. I don’t expect this to remain unchanged but we will see as the desktop use and perhaps even HPC cases increase. I get around 1073 GFLOPS on my Mac mini.
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Replying to and
For ARMv8.3 and beyond, increasing it means giving up on pointer authentication working properly. Existing platforms tend to already support using a substantially larger address space such as 48-bit via 4-level page tables and 4k pages. It just isn't being done in practice.
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Apple uses pointer authentication and they aren't going to want to give up on it to have a larger address space. I don't expect them to do that. The feature inherently needs a bunch of otherwise unused bits in pointers so using larger pages + deeper pages tables doesn't help.
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github.com/torvalds/linux 3-level page tables + 4k pages is near universal for Linux. We're using 4-level page tables + 4k pages for 48-bit address space (like typical x86_64) on GrapheneOS for ARMv8.2 and below. We'll go back for ARMv8.3 and above due to pointer auth though...
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