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Daniel Micay
@DanielMicay
The switch to 4-level page tables explained in this thread won't be happening for the oldest generation devices: twitter.com/DanielMicay/st There are GPU driver bugs uncovered by it which is what blocked doing this years ago. Sadly, that complicates using this in hardened_malloc.
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Daniel Micay
@DanielMicay
GrapheneOS is going to be moving to using the full 48-bit address space via 4-level page tables for current generation ARMv8.2 devices. There isn't really a future for the current hardened_malloc design with a 39-bit address space especially alongside CFI and other mappings.
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Daniel Micay
@DanielMicay
It will need to have a different build configuration for more modern devices where this works properly. It's one of many cases where devices from the more recent SoC generations have much more robust drivers. UBSan, ASan, and more general code quality improvements helped a lot.
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