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It does exist. Existing hardware has lots of safety features in hardware that are being actively used to catch these kinds of issues. More of those features are shipping over time. Intel CET and ARM MTE (which is like the existing SPARC ADI) are major examples of new features.
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There is nothing about Intel CET that requires UB from the language; as I said, the compiler/spec don't have to reveal how function calls work. In my C spec, a load/store would be said to either load/store or trap, depending on how the runtime/CPU did things. So ARM MTE is OK.
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So, it's okay to trap when indexing from one object to another and then dereferencing, or when constructing a non-derived pointer to an object in any other way and dereferencing it? That's what memory tagging will cause, since it aims to have the tags not match in those cases.
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Okay, so you don't want SPARC ADI and ARM MTE to be used as designed in a standards compliant C implementation which the current C standard permits. It's not playing games. Having at least a weak approximation of memory safety like tagging and various other features is important.
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It doesn't only impact malloc. It's designed to be usable for stack frames instead of stack canaries too. It also impacts usage of the pointers derived from what gets returned by malloc even in an implementation only using it for malloc. It doesn't only impact the malloc memory.
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I'm talking about memory tagging as a replacement for stack canaries, not stack canaries. I'm not sure why you're responding about stack canaries. Memory tagging the stack frame makes it so that trying to use pointers to the stack frame to access memory outside it will trap.
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Making that a second class, less supported option would also be a step backwards in this area. It would be *perfectly fine* if the standard said that signed integer overflow must either wrap or produce a poison value that is guaranteed to trap if it would be observable.
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