Calista Redmond

@Calista_Redmond

CEO, RISC-V Foundation at The Linux Foundation. Open Source hardware advocate, accidental vegetarian, snowboard liability, Girl Scout camp mom.

Could be anywhere
Vrijeme pridruživanja: travanj 2015.

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  2. 2. velj

    RISC-V meetup in Munich 28 Feb! Check out RISC-V First Meetup at HM Munich with Florian Wohlrab

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    25. stu 2019.
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    31. sij

    In case you missed Andes CTO Charlie Su's presentation at the 2019 RISC-V Summit, here's a short clip. The full video is at

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    29. sij

    Great article from exploring how uses in Snapdragon chips, with plans to equip nearly all of their own chips with RISC-V in the future. Lots of exciting advancements ahead!

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  6. 29. sij

    3. Open-source silicon. "It all adds up to more options for applying cutting edge technology to problems in more contexts"

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    28. sij

    Join us for our next RISC-V Bay Area Meetup - "Discover RISC-V SW tools you will love"! This event is free and will be held on February 13th at 5:30 in Milpitas...

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    29. sij

    📢 Vacancy: BSC is looking for talented and motivated professionals with expertise in Processor Design, Validation and IP integration for a European HPC accelerator in the EPI Project. The design is based on RISC-V architecture 👉

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    29. sij

    Now you can not only build applications on your RISC-V host or VM but also use the fantastic cross-build capability of Go to compile your application to this new architecture. Just "GOOS=linux GOARCH=riscv64 go build ." And you are done. Fresh binaries.

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    29. sij

    Super excited for hosting community conference!

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    29. sij

    “RISC-V Cores and SoC Overview” — status of various cores and SoCs that endeavor to implement the RISC-V specification; includes information about supplier, links, spec, language, and license used: 👉 Repository: 📝 h/t

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    29. sij

    RISC-V genealogy and collapsible tree: 👉 Dataset used by collapsible tree (JSON): 📎

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    24. sij

    Yunsup Lee, CTO of SiFive, spoke at the 2019 summit about taking into new markets. Watch the full video at the link below and see how SiFive is empowering by leading the development of a broad ecosystem.

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    27. sij

    5.5 has just been released. We list some of the main changes, as well as updates and new features specific to , , and architectures.

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  15. 28. sij
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  16. 28. sij

    . appointed former and engineer Chris Lattner to lead ’s Platform Engineering, which leverages design methodology for customizable chips:

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  17. 28. sij

    ESP Open Source Research Platform Enables the Design of RISC-V & Sparc SoC's with Accelerators

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    Slides for my presentation on and open source chip design at hackerspace tonight

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    Wondering what licenses various RISC-V processor core implementations use? Check out this page on Foundation website:

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    28. sij
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