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AndreaBarisani's profile
Andrea Barisani
Andrea Barisani
Andrea Barisani
Verified account
@AndreaBarisani

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Andrea BarisaniVerified account

@AndreaBarisani

Head of Hardware Security - F-Secure ■ Founder - Inverse Path

Trieste
andrea.bio
Joined August 2014

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    1. Andrea Barisani‏Verified account @AndreaBarisani 16 Oct 2017

      The Infineon bug highlights a larger issue. Lower level crypto stack certifications failed to prevent varied classes of bugs. (1/4)

      3 replies 25 retweets 34 likes
      Show this thread
    2. Andrea Barisani‏Verified account @AndreaBarisani 16 Oct 2017

      Having "softer" but easier to update crypto stacks (e.g. Go) is almost always preferred and a safer choice for many reasons. (2/4)

      1 reply 6 retweets 4 likes
      Show this thread
    3. Andrea Barisani‏Verified account @AndreaBarisani 16 Oct 2017

      Nowadays performance or BOM cost is not a huge issue, favor more powerful components if you can update them more easily. (3/4)

      2 replies 3 retweets 1 like
      Show this thread
    4. Andrea Barisani‏Verified account @AndreaBarisani 16 Oct 2017

      This is the fundamental reason behind the idea of giving the USB armory a full blown SoC rather than a smartcard. (4/4)

      1 reply 4 retweets 8 likes
      Show this thread
    5. Nikita Abdullin‏ @0xABD 16 Oct 2017
      Replying to @AndreaBarisani

      Securing a modern SoC is not easy, no software can fix a TEE issue when a chip does not provide enough isolation on hardware level.

      1 reply 0 retweets 1 like
    6. Nikita Abdullin‏ @0xABD 16 Oct 2017
      Replying to @0xABD @AndreaBarisani

      Most HSMs that matter have long ago adopted an “FPGA in a tamper-proof metal box” approach, but that is not a silver bullet

      1 reply 0 retweets 2 likes
    7. Nikita Abdullin‏ @0xABD 16 Oct 2017
      Replying to @0xABD @AndreaBarisani

      PKI key generation requires power, entropy, and trusted isolation well suited for “FPGA in a safe” model, as prescribed by authorities

      1 reply 0 retweets 1 like
    8. Nikita Abdullin‏ @0xABD 16 Oct 2017
      Replying to @0xABD @AndreaBarisani

      Smartcards were never that good at PRNG nor asymmetric key generation, but that does not mean they have to be abandoned in favor of SoC’s

      1 reply 0 retweets 1 like
    9. Nikita Abdullin‏ @0xABD 16 Oct 2017
      Replying to @0xABD @AndreaBarisani

      Smartcards present a reduced attack surface and formidable countermeasures against SCA and FI. SoC world is a dumpster fire in comparison

      1 reply 1 retweet 2 likes
    10. Andrea Barisani‏Verified account @AndreaBarisani 17 Oct 2017
      Replying to @0xABD

      I'd take a larger, but upgradable, attack surface over a smaller one which can only be replaced by physical means, any day of the year.

      1 reply 0 retweets 0 likes
      Andrea Barisani‏Verified account @AndreaBarisani 17 Oct 2017
      Replying to @AndreaBarisani @0xABD

      Also, side channels and FI are not a relevant threat in a wide variety of scenarios and can anyway be accounted for in SoC running firmware.

      1:23 AM - 17 Oct 2017
      2 replies 0 retweets 0 likes
        1. New conversation
        2. Nikita Abdullin‏ @0xABD 17 Oct 2017
          Replying to @AndreaBarisani

          Unfortunately, with the complexity of modern SoC’s __everything__ on the die can be a remote SCA or FI vector, see CLKSCREW, etc.

          1 reply 0 retweets 0 likes
        3. Andrea Barisani‏Verified account @AndreaBarisani 17 Oct 2017
          Replying to @0xABD

          With the correct code failsafes these can be detected and prevented or made extremely hard, in the safety world this is routine.

          3 replies 0 retweets 0 likes
        4. Cristofaro Mune‏ @pulsoid 17 Oct 2017
          Replying to @AndreaBarisani @0xABD

          We demonstrated (@ #hwio17 & FDTC) a FI attack that yields code exec and entirely bypasses FI mitigations in SW, including failsafe checks.

          2 replies 0 retweets 3 likes
        5. Andrea Barisani‏Verified account @AndreaBarisani 17 Oct 2017
          Replying to @pulsoid @0xABD

          I am well aware of your (spectacular) research :), but I would still argue that for most use cases a smartcard is not intrinsically better.

          1 reply 0 retweets 1 like
        6. Cristofaro Mune‏ @pulsoid 17 Oct 2017
          Replying to @AndreaBarisani @0xABD

          On that point (& many others) I agree with you. It boils down on the threat model and the kind of attacks/attackers you're defending from.

          0 replies 1 retweet 4 likes
        7. End of conversation
        1. New conversation
        2. Nikita Abdullin‏ @0xABD 17 Oct 2017
          Replying to @AndreaBarisani

          SoC’s can have extensive boot ROMs with many kilobytes of highly sensitive code, and an issue in that means physical replacement anyway.

          1 reply 0 retweets 0 likes
        3. Andrea Barisani‏Verified account @AndreaBarisani 17 Oct 2017
          Replying to @0xABD

          Agreed, this is an issue which is a reflection of the specific problem I am highlighting, but such ROMs handle far less than a smart card.

          0 replies 0 retweets 0 likes
        4. End of conversation

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