@stmanfr @datapulte it is as open and verifiable as it gets, good luck finding 100% open silicon to reach same goals and form
@stmanfr @datapulte also all other components are passive and their electrical role is easy to identify and inspect, attack surface is low
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@AndreaBarisani device logic made out of finite state machines in cabled logic into an FPGA. That was ly point, indeed. @datapulte -
@stmanfr @datapulte theoretically you are right, we just wanted to do something practical and not in the realm of science fiction ;) -
@AndreaBarisani market AND priorities : If 100% security is your goal, it worth it. But this was NOT your primary goal. @datapulte -
@stmanfr @datapulte I don't believe in 100% security and I don't believe that the approach you describe can be achieved "100%" anyway. -
@AndreaBarisani You are wrong on that last point. It is already done by several designs on OpenCores and I am also doing it. It @datapulte
End of conversation
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@AndreaBarisani To have a nul software attack surface, you have to get rid of software & microprocessor, and switch to 100% @datapulteThanks. Twitter will use this to make your timeline better. UndoUndo
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@AndreaBarisani Yes, it is low, but not nul. It wouldn't resist NSA & determined hackers. @datapulteThanks. Twitter will use this to make your timeline better. UndoUndo
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